# [1] J. Abu-Qahouq, H. Mao, and I. Batarseh, "Multiphase voltage-mode hysteretic controlled dc-dc converter with novel current sharing,"

[1] J. Abu-Qahouq, H. Mao, and I. Batarseh, "Multiphase voltage-mode hysteretic controlled dc-dc converter with novel current sharing,"*IEEE Transactions on Power Electronics*, vol. 19, no. 6, pp. 1397-1407, 2004.

Today's on-board high-density, low-output-voltage, high-output-current, fast transient point-of-load (POL) dc-dc converters design requirements for the new generation of integrated circuits, digital signal processors, and microprocessors are increasingly becoming stricter than ever. This is due to the demand for high dynamic performance dc-dc conversion with tight dynamic tolerances for supply voltages coupled with very high power density. In this paper, a multiphase voltage-mode hysteretic controlled POL dc-dc converter with new current sharing is presented. Theoretical analysis is provided for multiphase and interleaved dc-dc converters with new current sharing method. The simulation and experimental results are compared based on a specific design example. © 2004 IEEE.

[2] H. Akagi, H. Hasegawa, and T. Doumoto, "Design and performance of a passive emi filter for use with a voltage-source pwm inverter having sinusoidal output voltage and zero common-mode voltage,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 4, pp. 1069-1076, 2004.

This paper deals with integrating a small-sized passive electromagnetic interference (EMI) filter with a voltage-source pulse-width modulated (PWM) inverter. The purpose of the filter is to eliminate both high-frequency common-mode and normal-mode voltages from the three-phase output voltages of the inverter. A laboratory system consisting of a 5-kVA inverter, a 3.7-kW induction motor, and a specially-designed passive EMI filter was constructed to verify the viability and effectiveness of the filter. As a result, both line-to-line and line-to-neutral output voltages look purely sinusoidal as if the inverter were an ideal three-phase variable-voltage, variable-frequency power supply when viewed from the motor terminals. This results in a complete solution to serious EMI issues related to high-frequency common-mode and normal-mode voltages produced by the PWM inverter. © 2004 IEEE.

[3] J. Allmeling, "A control structure for fast harmonics compensation in active filters,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 2, pp. 508-514, 2004.

Shunt active filters are a means to improve power quality in distribution networks. Typically, they are connected in parallel to disturbing loads in order to reduce the injection of non sinusoidal load currents into the utility grid. The high power active filter investigated in this paper is based on a pulse-width modulation (PWM) controlled voltage source inverter. Its inner current control is realized with a dead-beat controller that allows fast tracking of stochastically fluctuating load currents. For the mitigation of stationary load current harmonics, an outer control loop is required that compensates for the persistant phase error caused by the delay of the inner loop. The outer loop developed in this paper is based on integrating oscillators tuned to the major load current harmonics. Mathematically, they are equivalent to I-controllers in rotating reference frames. Some of these oscillators are located within a closed control loop. For frequencies where the feedback would excite grid resonances they are placed in a prefilter with phase shifting elements. Since ail oscillators share a common feedback full selectivity of the harmonic analysis is achieved. For every harmonic the degree of compensation can be adjusted individually. In addition to the oscillators, a direct path is provided that feeds forward the load current to the inner control loop. Thus, load current transients can be tracked with the full speed of the dead-beat controller. The direct path does not affect the harmonic analysis performed by the oscillators.

[4] J. M. Alonso, A. J. Calleja, J. Ribas, E. Lopez Corominas, and M. Rico-Secades, "Analysis and design of a novel single-stage high-power-factor electronic ballast based on integrated buck half-bridge resonant inverter,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 2, pp. 550-559, 2004.

A novel single-stage high-power-factor electronic ballast obtained from the integration of a buck dc-to-dc converter and a half-bridge resonant inverter is analyzed in this paper. The buck converter is operated in discontinuous conduction mode and at constant frequency providing an input power factor high enough to satisfy present standard requirements. The operation of the proposed ballast is also investigated in detail in this paper, obtaining the important equations and characteristics in order to allow interested readers to perform an easy design. A ballast prototype supplying two 36 W fluorescent lamps has been both simulated and implemented at the laboratory. The results predict good market possibilities for the proposed topology in terms of reliability, cost, efficiency, and lamp life.

[5] H. Awad, J. Svensson, and M. Bollen, "Mitigation of unbalanced voltage dips using static series compensator,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 3, pp. 837-846, 2004.

The static series compensator (SSC) is suited to protect sensitive loads against voltage dips. Because most of the power system faults are single- or double-phase, the control algorithms of the SSC should be adapted for unbalanced dips. This paper proposes two control strategies to improve the dynamic performance of the SSC. The first strategy uses a fast technique for separating positive and negative sequence components of the supply voltage, which are then controlled separately. Thus, two controllers are implemented for the two sequences, each based on vector control. The second strategy is based on using only a positive sequence controller and increasing the switching frequency. Consequently, the negative sequence due to the unbalanced dip is transformed into variations in the positive sequence. As the switching frequency increases, the ability of the controller to follow those variations improves. The validity of the proposed strategies is demonstrated through PSCAD/EMTDC simulation and experimental measurements carried out on a 10-kV SSC, when the grid is subjected to unbalanced voltage dips.

[6] R. Ayyanar, R. Giri, and N. Mohan, "Active input-voltage and load-current sharing in input-series and output-parallel connected modular dc-dc converters using dynamic input-voltage reference scheme,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 6, pp. 1462-1473, 2004.

This paper explores a new configuration for modular dc-dc converters, namely, series connection at the input, and parallel connection at the output, such that the converters share the input voltage and load current equally. This is an important step toward realizing a truly modular power system architecture, where low-power, low-voltage, building block modules can be connected in any series/parallel combination at input or at output, to realize any given system specifications. A three-loop control scheme, consisting of a common output voltage loop, individual inner current loops, and individual input voltage loops, is proposed to achieve input voltage and load current sharing. The output voltage loop provides the basic reference for inner current loops, which is modified by the respective input voltage loops. The average of converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. The input-series and output-parallel (ISOP) configuration is analyzed using the incremental negative resistance model of dc-dc converters. Based on the analysis, design methods for input voltage controller are developed. Analysis and proposed design methods are verified through simulation, and experimentally, on an ISOP system consisting of two forward converters. © 2004 IEEE.

[7] S. Azzopardi, J.-M. Vinassa, E. Woirgard, C. Zardini, and O. Briat, "A systematic hard- and soft-switching performances evaluation of 1200 v punchthrough igbt structures,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 1, pp. 231-241, 2004.

The performances of various 1200 V insulated gate bipolar transistor (IGBT) structures for hard- and soft-switching (both the zero-voltage and the zero-current switching) at high temperature and under various test conditions are investigated in detail. A comparison is made between a conventional planar punchthrough IGBT (P-IGBT) using global lifetime control, a trench punchthrough IGBT (T-IGBT) using local lifetime control and a enhanced planar punchthrough IGBT (N-IGBT) also using the local lifetime control process. A simple and effective specific test circuit allows hard- and soft-switching operating modes, and provides also an independent control on the test parameters (load current, clamping voltage, gate resistance, temperature, dead times). It is highlighted that the local lifetime control is very efficient at high temperature reducing especially the turn-off losses. Furthermore, the T-IGBT exhibits very good performances during hard- and soft-switching turn-off, but this is not the case during hard-switching and zero-voltage switching turn-on. Due to its high input capacitance, the hard-switching turn-on losses are relatively high. Regarding the N-IGBT, it presents good performances under hard-switching and also zero-voltage switching. However, like the T-IGBT, its structure has a strong "inductance behavior" during zero-voltage turn-on increasing the conductivity modulation lag and also the voltage spike leading to high losses. AH these data allow to provide useful information for the devices modeling, design, and optimization.

[8] M. R. Baiju, K. K. Mohapatra, R. S. Kanchan, and K. Gopakumar, "A dual two-level inverter scheme with common mode voltage elimination for an induction motor drive,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 3, pp. 794-805, 2004.

Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.

[9] I. Barbi, R. Gules, R. Redl, and N. O. Sokal, "Dc-dc converter: Four switches vpk = vin/2, capacitive turn-off snubbing, zv turn-on,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 4, pp. 918-927, 2004.

A new four-switch full-bridge dc-dc converter topology is especially well-suited for power converters operating from high input voltage: it imposes only half of the input voltage across each of the four switches. The two legs of a full-bridge converter are connected in series with each other, across the dc input source, instead of the usual topology in which each leg is connected across the dc source. The topology reduces turn-off switching losses by providing capacitive snubbing of the turn-off voltage transient, and eliminates capacitor-discharge turn-on losses by providing zero-voltage turn-on. (Switching losses are especially important in converters operating at high input voltage because turn-on losses are proportional to the square of the input voltage, and turn-off losses are proportional to the input voltage). The topology is suitable for resonant and nonresonant converters. It adds one bypass capacitor and one commutating inductor to the minimum-topology full-bridge converter (that inductor is already present in many present-day converters, to provide zero-voltage turn-on, or is associated with one or two capacitors to provide resonant operation), and contains a dc-blocking capacitor in series with the output transformer, primary winding, and some nonresonant converters (that capacitor is already present in resonant power converters). The paper gives a theoretical analysis, and experimental data on a 1.5-kW example that was built and tested: 600-Vdc input, 60-Vdc output at up to 25 A, and 50-kHz switching frequency. The measured performance agreed well with the theoretical predictions. The measured efficiency was 93.6% at full load, and was a maximum of 95.15% at 44.8% load. © 2004 IEEE.

[10] A. Barrado, E. Olias, A. Lazaro, J. Pleite, and R. Vazquez, "Pwm-pd multiple output dc/dc converters: Operation and control-loop modeling,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 1, pp. 140-149, 2004.

ln this paper, PWM-PD multiple output dc/dc converters are presented. Operation analysis and power block design are shown. Furthermore, a small-signal model is developed for the PWM-PD multiple output dc/dc converters working in continuous conduction mode. The control-block is presented and the closed-loop circuit performances, such as the line, load and cross regulation, are obtained analytically. Finally, experimental results for a PWM-PD converter, with three fully regulated outputs and with transformer, are shown.

[11] A. Barrado, R. Vazquez, E. Olias, A. Lazaro, and J. Pleite, "Theoretical study and implementation of a fast transient response hybrid power supply,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 4, pp. 1003-1009, 2004.

This paper presents a theoretical and experimental study of the hybrid sources capabilities to improve both the dynamic response and the stability of switching power supplies. The hybrid sources are composed by both, a linear and a switching source connected in parallel. The reached improvements have been possible without affecting, significantly, the efficiency of the whole circuit. This solution is checked in low voltage sources. The obtained experimental results show that these power supplies present high dynamical performance, and therefore they can be used to feed disgital signal processors and microprocessors. © 2004 IEEE.

[12] L. H. S. C. Barreto, E. A. A. Coelho, V. J. Farias, L. C. De Freitas, and J. B. Vieira Jr, "The bang-bang hysteresis current waveshaping control technique used to implement a high power factor power supply,"

*IEEE Transactions on Power Electronics*, vol. 19, no. 1, pp. 160-168, 2004.

This work reports the operation and development of a high power factor power supply that operates at high switching frequency. An optimum power factor correction is obtained using an ac-dc boost converter associated to a nondissipative snubber as a pre-regulator circuit, which presents reduced commutation losses The same nondissipative snubber is associated to a Forward converter and then used as a dc-dc stage. The proposed switched mode power supply presents high power factor (0.998), high efficiency (91%), low harmonic content (current and voltage total harmonic distortion rates equal to 2.84% and 2.83%, respectively), and also satisfactory regulation. The converter has been theoretically analyzed, designed, simulated and implemented, where experimental results show that soft commutation in all switches is achieved.

[13] T. S. Basso and R. DeBlasio, "Ieee 1547 series of standards: Interconnection issues,"

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